[PATCH] D63476: [ARM] DLS/LE low-overhead loop code generation
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 24 01:03:26 PDT 2019
samparker marked 2 inline comments as done.
samparker added inline comments.
================
Comment at: lib/Target/ARM/ARMFinalizeLoops.cpp:139
+ Revert = true;
+ }
+ }
----------------
SjoerdMeijer wrote:
> if `Revert` is true here at some point, can we stop iterating over the rest of the blocks/instructions?
Maybe... We'd still need to find 'End' and that would be the terminator, but I guess it could help prevent visiting other blocks. I reorder the block iterator and that should work.
================
Comment at: test/Transforms/HardwareLoops/ARM/massive.mir:1
+# RUN: llc -mtriple=armv8.1m.main -run-pass=arm-finalize-loops %s -o - | FileCheck %s
+# CHECK: body:
----------------
SjoerdMeijer wrote:
> yes, it is massive! :-) But I think we can simplify this a lot by using intrinsic `@llvm.arm.space`:
>
> // A space-consuming intrinsic primarily for testing ARMConstantIslands. The
> // first argument is the number of bytes this "instruction" takes up, the second
> // and return value are essentially chains, used to force ordering during ISel.
> def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
>
> as mentioned constant island tests are using this, I think you want to do something similar here.
Bingo! Thanks
Repository:
rL LLVM
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https://reviews.llvm.org/D63476/new/
https://reviews.llvm.org/D63476
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