[PATCH] D58736: [System Model] Introduce a target system model
David Greene via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 20 10:19:36 PDT 2019
greened marked an inline comment as done.
greened added a comment.
I just posted D63614 <https://reviews.llvm.org/D63614>, the subset of this patch covering only the changes to TTI and related classes.
================
Comment at: llvm/include/llvm/CodeGen/BasicTTIImpl.h:523
+
+ // \return The cache line size in bytes.
+ virtual unsigned getCacheLineSize() const {
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greened wrote:
> arsenm wrote:
> > All of these should probably have address space arguments
> What would the address space argument specify? What are the use-cases for modeling caches with address spaces? Perhaps this could replace the `resolve...` APIs. That would be nice.
>
> These are existing interfaces so what would be the best way to transition them?
It's probably more productive to continue this discussion on D63614, which is the TTI part of this patch.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D58736/new/
https://reviews.llvm.org/D58736
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