[PATCH] D62996: Improve reduction intrinsics by overloading result value.

Phabricator via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 13 02:36:43 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rL363240: Improve reduction intrinsics by overloading result value. (authored by s.desmalen, committed by ).
Herald added a project: LLVM.

Changed prior to commit:
  https://reviews.llvm.org/D62996?vs=203503&id=204455#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62996/new/

https://reviews.llvm.org/D62996

Files:
  llvm/trunk/docs/LangRef.rst
  llvm/trunk/include/llvm/IR/Intrinsics.h
  llvm/trunk/include/llvm/IR/Intrinsics.td
  llvm/trunk/lib/IR/Function.cpp
  llvm/trunk/lib/IR/IRBuilder.cpp
  llvm/trunk/test/Analysis/CostModel/AArch64/vector-reduce.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-add-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-add.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-and-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-and.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-mul-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-mul.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-or-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-or.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-smax-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-smax.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-smin-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-smin.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-umax-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-umax.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-umin-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-umin.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-xor-widen.ll
  llvm/trunk/test/Analysis/CostModel/X86/reduce-xor.ll
  llvm/trunk/test/CodeGen/AArch64/aarch64-addv.ll
  llvm/trunk/test/CodeGen/AArch64/aarch64-minmaxv.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-vabs.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-add-legalization.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-and-legalization.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-bool.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
  llvm/trunk/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
  llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-add-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-add.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-and-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-and.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-fmax.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-fmin.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-or-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-or.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-smax-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-smax.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-smin-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-smin.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-umax-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-umax.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-umin-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-umin.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-xor-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-reduce-xor.ll
  llvm/trunk/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll
  llvm/trunk/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
  llvm/trunk/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
  llvm/trunk/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
  llvm/trunk/test/Transforms/SLPVectorizer/AArch64/transpose.ll
  llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp





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