[PATCH] D54093: [RISCV] Lower inline asm constraints I, J & K for RISC-V

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.


================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:2168
+        if (C->getZExtValue() == 0)
+          Ops.push_back(DAG.getTargetConstant(0, SDLoc(Op),
+                                              Subtarget.getXLenVT()));
----------------
clang-format forms this as:
```
+          Ops.push_back(
+              DAG.getTargetConstant(0, SDLoc(Op), Subtarget.getXLenVT()));
```


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54093/new/

https://reviews.llvm.org/D54093