[llvm] r362817 - AMDGPU: Fix MIR test verifier error

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Fri Jun  7 10:55:07 2019
New Revision: 362817

URL: http://llvm.org/viewvc/llvm-project?rev=362817&view=rev
Log:
AMDGPU: Fix MIR test verifier error

Modified:
    llvm/trunk/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir

Modified: llvm/trunk/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir?rev=362817&r1=362816&r2=362817&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir Fri Jun  7 10:55:07 2019
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=polaris10 -run-pass si-insert-skips -amdgpu-skip-threshold=1 %s -o - | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=polaris10 -run-pass si-insert-skips -amdgpu-skip-threshold=1 -verify-machineinstrs  %s -o - | FileCheck %s
 
 ---
 
@@ -7,7 +7,7 @@ name: skip_execz_flat
 body: |
   ; CHECK-LABEL: name: skip_execz_flat
   ; CHECK: bb.0:
-  ; CHECK:   successors: %bb.1(0x80000000)
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
   ; CHECK:   SI_MASK_BRANCH %bb.2, implicit $exec
   ; CHECK:   S_CBRANCH_EXECZ %bb.2, implicit $exec
   ; CHECK: bb.1:
@@ -17,7 +17,7 @@ body: |
   ; CHECK: bb.2:
   ; CHECK:   S_ENDPGM 0
   bb.0:
-    successors: %bb.1
+    successors: %bb.1, %bb.2
     SI_MASK_BRANCH %bb.2, implicit $exec
 
   bb.1:
@@ -35,7 +35,7 @@ name: skip_execz_mubuf
 body: |
   ; CHECK-LABEL: name: skip_execz_mubuf
   ; CHECK: bb.0:
-  ; CHECK:   successors: %bb.1(0x80000000)
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
   ; CHECK:   SI_MASK_BRANCH %bb.2, implicit $exec
   ; CHECK:   S_CBRANCH_EXECZ %bb.2, implicit $exec
   ; CHECK: bb.1:
@@ -45,7 +45,7 @@ body: |
   ; CHECK: bb.2:
   ; CHECK:   S_ENDPGM 0
   bb.0:
-    successors: %bb.1
+    successors: %bb.1, %bb.2
     SI_MASK_BRANCH %bb.2, implicit $exec
 
   bb.1: