[PATCH] D62498: [x86] split 256-bit store of concatenated vectors

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked an inline comment as done.
spatel added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:21088
+  if (StoreVT.is256BitVector()) {
+    if (StoredVal.getOpcode() != ISD::CONCAT_VECTORS || !StoredVal.hasOneUse())
+      return SDValue();
----------------
spatel wrote:
> RKSimon wrote:
> > Not sure if its any use but I created the collectConcatOps helper to do something similar
> I'm not sure if the insert_subvector pattern appears here, but it's definitely worth a look. I'll push this as-is to make sure it doesn't break anything, then look at using collectConcatOps as an improvement.
rL362620 - use collectConcatOps().


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62498/new/

https://reviews.llvm.org/D62498