[PATCH] D62847: [PowerPC] reorder LSR and PPCCTRLoops pass
Hal Finkel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 12:00:18 PDT 2019
hfinkel added a comment.
I'm really uneasy about this change. PPCCTRLoops inserts special loop intrinsics which the rest of the loop-optimization pipeline doesn't understand, and so logically, it should come last. It's pretty clear that LSR is interfering with PPCCTRLoops, is this because it transforms the loops into some form that SCEV doesn't understand? Could we adjust LSR to make it more friendly to hardware-assisted loops? In theory, if LSR had the right cost model, it could actually make *more* loops that PPCCTRLoops could handle, and not fewer?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62847/new/
https://reviews.llvm.org/D62847
More information about the llvm-commits
mailing list