[PATCH] D62668: [ARM] First MVE instructions: scalar shifts.

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:39
+def t2SQSHL : t2MVEShiftSRegImm<"sqshl"> {
+  let Inst{5-4} = 0b11;
+}
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I think it would be better to pass bits {5-4} as an argument. Then the definition would look like:

   def t2SQSHL : t2MVEShiftSRegImm<"sqshl", 0b11>;

which I think is nicer, conciser, and more consistent (with other .td descriptions).

Same for other instructions further below.


Repository:
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  https://reviews.llvm.org/D62668/new/

https://reviews.llvm.org/D62668