[PATCH] D62726: [X86] Use fresh MemOps when emitting VAARG64

[Luke Lau via Phabricator via llvm-commits]

luke created this revision.
luke added a reviewer: RKSimon.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Previously it copied over MachineMemOperands verbatim which caused MOV32rm to
have store flags set, and MOV32mr to have load flags set. This fixes some assertions
being thrown with EXPENSIVE_CHECKS on.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D62726

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28669,10 +28669,23 @@
   unsigned ArgMode = MI.getOperand(7).getImm();
   unsigned Align = MI.getOperand(8).getImm();
 
+  MachineFunction *MF = MBB->getParent();
+
   // Memory Reference
   assert(MI.hasOneMemOperand() && "Expected VAARG_64 to have one memoperand");
-  SmallVector<MachineMemOperand *, 1> MMOs(MI.memoperands_begin(),
-                                           MI.memoperands_end());
+
+  MachineMemOperand *OldMMO = MI.memoperands().front();
+
+  MachineMemOperand *LoadOnlyMMO = MF->getMachineMemOperand(
+      OldMMO->getPointerInfo(), MachineMemOperand::MOLoad, OldMMO->getSize(),
+      OldMMO->getBaseAlignment(), OldMMO->getAAInfo(), OldMMO->getRanges(),
+      OldMMO->getSyncScopeID(), OldMMO->getOrdering(),
+      OldMMO->getFailureOrdering());
+  MachineMemOperand *StoreOnlyMMO = MF->getMachineMemOperand(
+      OldMMO->getPointerInfo(), MachineMemOperand::MOStore, OldMMO->getSize(),
+      OldMMO->getBaseAlignment(), OldMMO->getAAInfo(), OldMMO->getRanges(),
+      OldMMO->getSyncScopeID(), OldMMO->getOrdering(),
+      OldMMO->getFailureOrdering());
 
   // Machine Information
   const TargetInstrInfo *TII = Subtarget.getInstrInfo();
@@ -28737,7 +28750,6 @@
     OverflowDestReg = MRI.createVirtualRegister(AddrRegClass);
 
     const BasicBlock *LLVM_BB = MBB->getBasicBlock();
-    MachineFunction *MF = MBB->getParent();
     overflowMBB = MF->CreateMachineBasicBlock(LLVM_BB);
     offsetMBB = MF->CreateMachineBasicBlock(LLVM_BB);
     endMBB = MF->CreateMachineBasicBlock(LLVM_BB);
@@ -28770,7 +28782,7 @@
         .add(Index)
         .addDisp(Disp, UseFPOffset ? 4 : 0)
         .add(Segment)
-        .setMemRefs(MMOs);
+        .setMemRefs(LoadOnlyMMO);
 
     // Check if there is enough room left to pull this argument.
     BuildMI(thisMBB, DL, TII->get(X86::CMP32ri))
@@ -28795,7 +28807,7 @@
         .add(Index)
         .addDisp(Disp, 16)
         .add(Segment)
-        .setMemRefs(MMOs);
+        .setMemRefs(LoadOnlyMMO);
 
     // Zero-extend the offset
     unsigned OffsetReg64 = MRI.createVirtualRegister(AddrRegClass);
@@ -28823,7 +28835,7 @@
         .addDisp(Disp, UseFPOffset ? 4 : 0)
         .add(Segment)
         .addReg(NextOffsetReg)
-        .setMemRefs(MMOs);
+        .setMemRefs(StoreOnlyMMO);
 
     // Jump to endMBB
     BuildMI(offsetMBB, DL, TII->get(X86::JMP_1))
@@ -28842,7 +28854,7 @@
       .add(Index)
       .addDisp(Disp, 8)
       .add(Segment)
-      .setMemRefs(MMOs);
+      .setMemRefs(LoadOnlyMMO);
 
   // If we need to align it, do so. Otherwise, just copy the address
   // to OverflowDestReg.
@@ -28879,7 +28891,7 @@
       .addDisp(Disp, 8)
       .add(Segment)
       .addReg(NextAddrReg)
-      .setMemRefs(MMOs);
+      .setMemRefs(StoreOnlyMMO);
 
   // If we branched, emit the PHI to the front of endMBB.
   if (offsetMBB) {


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