[PATCH] D62263: [DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.

LGTM. This should never be worse for AMDGPU



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Comment at: test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll:19-20
 ; VARIANT0-NEXT:    buffer_store_dword v0, v[1:2], s[4:7], 0 addr64
-; VARIANT0-NEXT:    s_waitcnt expcnt(0)
-; VARIANT0-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; VARIANT0-NEXT:    s_waitcnt vmcnt(0)
+; VARIANT0-NEXT:    v_add_i32_e32 v3, vcc, s2, v3
+; VARIANT0-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
 ; VARIANT0-NEXT:    s_barrier
----------------
This test shouldn't be relevant to this change, but I guess we're stuck with it for now


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  rL LLVM

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https://reviews.llvm.org/D62263