[PATCH] D40554: [PowerPC] Fix bugs in sign-/zero-extension elimination

[Amy Kwan via Phabricator via llvm-commits]

amyk updated this revision to Diff 201651.
amyk added a subscriber: nemanjai.
amyk added a comment.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

- Rebased to the latest source (fix conflicts, ran functional tests)
- Fixed `llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll` to remove redundant sign extend instruction
- Added the following check in `PPCMIPeephole.cpp` to only perform the LWZ->LWA transformation when the displacement is a multiple of 4

  // The transformation from a zero-extending load to a sign-extending
  // load is only legal when the displacement is a multiple of 4.
  // If the displacement is not at least 4 byte aligned, don't perform
  // the transformation.
  if (SrcMI->getOperand(1).isGlobal() &&
      SrcMI->getOperand(1).getGlobal()->getAlignment() < 4)
    break;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D40554/new/

https://reviews.llvm.org/D40554

Files:
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.h
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/expand-isel.ll
  llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
  llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
  llvm/test/CodeGen/PowerPC/ppc-ctr-dead-code.ll
  llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
  llvm/test/CodeGen/PowerPC/sext_elimination.mir

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