[PATCH] D62519: AMDGPU: Don't enable all lanes with non-CSR VGPR spills

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 28 06:17:55 PDT 2019

arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

If the only VGPRs used for SGPR spilling were not CSRs, this was
enabling all laness and immediately restoring exec. This is the usual
situation in leaf functions.



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