[llvm] r361819 - MIR: Fix printer crashing on dead CSR frame indexes

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue May 28 06:08:32 PDT 2019


Author: arsenm
Date: Tue May 28 06:08:31 2019
New Revision: 361819

URL: http://llvm.org/viewvc/llvm-project?rev=361819&view=rev
Log:
MIR: Fix printer crashing on dead CSR frame indexes

Added:
    llvm/trunk/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
Modified:
    llvm/trunk/lib/CodeGen/MIRPrinter.cpp

Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=361819&r1=361818&r2=361819&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Tue May 28 06:08:31 2019
@@ -403,6 +403,9 @@ void MIRPrinter::convertStackObjects(yam
   }
 
   for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
+    if (!CSInfo.isSpilledToReg() && MFI.isDeadObjectIndex(CSInfo.getFrameIdx()))
+      continue;
+
     yaml::StringValue Reg;
     printRegMIR(CSInfo.getReg(), Reg, TRI);
     if (!CSInfo.isSpilledToReg()) {

Added: llvm/trunk/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir?rev=361819&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir Tue May 28 06:08:31 2019
@@ -0,0 +1,28 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=prologepilog -o - %s | FileCheck %s
+
+# Make sure the MIR printer doesn't crash when there are dead frame indexes. The
+# CSR SGPR frame indexes are inserted, but deleted.
+
+# CHECK-LABEL: name: csr_sgpr
+# CHECK: fixedStack: []
+# CHECK: stack: []
+---
+name:            csr_sgpr
+tracksRegLiveness: true
+liveins:
+  - { reg: '$sgpr30_sgpr31' }
+frameInfo:
+  maxAlignment:    4
+machineFunctionInfo:
+  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
+  scratchWaveOffsetReg: '$sgpr4'
+  frameOffsetReg:  '$sgpr5'
+  stackPtrOffsetReg: '$sgpr32'
+body:             |
+  bb.0:
+    liveins: $sgpr30_sgpr31
+
+    INLINEASM &"; clobber s42", 1, 12, implicit-def dead early-clobber $sgpr42
+    S_SETPC_B64_return $sgpr30_sgpr31
+
+...




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