[llvm] r361715 - [ARM] Select fp16 fabs

[David Green via llvm-commits]

Author: dmgreen
Date: Sun May 26 03:51:58 2019
New Revision: 361715

URL: http://llvm.org/viewvc/llvm-project?rev=361715&view=rev
Log:
[ARM] Select fp16 fabs

This adds a pattern for the fabs intrinsic, the same as float and double.

Differential Revision: https://reviews.llvm.org/D62324

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
    llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=361715&r1=361714&r2=361715&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Sun May 26 03:51:58 2019
@@ -595,9 +595,9 @@ def VABSS  : ASuIn<0b11101, 0b11, 0b0000
 }
 
 def VABSH  : AHuI<0b11101, 0b11, 0b0000, 0b11, 0,
-                   (outs SPR:$Sd), (ins SPR:$Sm),
+                   (outs HPR:$Sd), (ins HPR:$Sm),
                    IIC_fpUNA16, "vabs", ".f16\t$Sd, $Sm",
-                   []>;
+                   [(set HPR:$Sd, (fabs (f16 HPR:$Sm)))]>;
 
 let Defs = [FPSCR_NZCV] in {
 def VCMPEZD : ADuI<0b11101, 0b11, 0b0101, 0b11, 0,

Modified: llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll?rev=361715&r1=361714&r2=361715&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll Sun May 26 03:51:58 2019
@@ -312,13 +312,17 @@ define void @test_sqrt(half* %p) {
 ;  ret void
 ;}
 
-; FIXME
-;define void @test_fabs(half* %p) {
-;  %a = load half, half* %p, align 2
-;  %r = call half @llvm.fabs.f16(half %a)
-;  store half %r, half* %p
-;  ret void
-;}
+define void @test_fabs(half* %p) {
+; CHECK-LABEL: test_fabs:
+; CHECK:         vldr.16 s0, [r0]
+; CHECK-NEXT:    vabs.f16 s0, s0
+; CHECK-NEXT:    vstr.16 s0, [r0]
+; CHECK-NEXT:    bx lr
+  %a = load half, half* %p, align 2
+  %r = call half @llvm.fabs.f16(half %a)
+  store half %r, half* %p
+  ret void
+}
 
 define void @test_minnum(half* %p, half* %q) {
 ; CHECK-LABEL: test_minnum: