[llvm] r361714 - [ARM] Select fp16 fsqrt

David Green via llvm-commits llvm-commits at lists.llvm.org
Sun May 26 03:42:24 PDT 2019


Author: dmgreen
Date: Sun May 26 03:42:24 2019
New Revision: 361714

URL: http://llvm.org/viewvc/llvm-project?rev=361714&view=rev
Log:
[ARM] Select fp16 fsqrt

This adds a pattern for the sqrt intrinsic, the same as float and double.

Differential Revision: https://reviews.llvm.org/D62322

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
    llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=361714&r1=361713&r2=361714&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Sun May 26 03:42:24 2019
@@ -1023,9 +1023,9 @@ def VSQRTS : ASuI<0b11101, 0b11, 0b0001,
              Sched<[WriteFPSQRT32]>;
 
 def VSQRTH : AHuI<0b11101, 0b11, 0b0001, 0b11, 0,
-                  (outs SPR:$Sd), (ins SPR:$Sm),
+                  (outs HPR:$Sd), (ins HPR:$Sm),
                   IIC_fpSQRT16, "vsqrt", ".f16\t$Sd, $Sm",
-                  []>;
+                  [(set HPR:$Sd, (fsqrt (f16 HPR:$Sm)))]>;
 
 let hasSideEffects = 0 in {
 let isMoveReg = 1 in {

Modified: llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll?rev=361714&r1=361713&r2=361714&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll Sun May 26 03:42:24 2019
@@ -217,13 +217,17 @@ define void @test_bitcast_i16tohalf(i16
   ret void
 }
 
-; FIXME
-;define void @test_sqrt(half* %p) {
-;  %a = load half, half* %p, align 2
-;  %r = call half @llvm.sqrt.f16(half %a)
-;  store half %r, half* %p
-;  ret void
-;}
+define void @test_sqrt(half* %p) {
+; CHECK-LABEL: test_sqrt:
+; CHECK:         vldr.16 s0, [r0]
+; CHECK-NEXT:    vsqrt.f16 s0, s0
+; CHECK-NEXT:    vstr.16 s0, [r0]
+; CHECK-NEXT:    bx lr
+  %a = load half, half* %p, align 2
+  %r = call half @llvm.sqrt.f16(half %a)
+  store half %r, half* %p
+  ret void
+}
 
 ; FIXME
 ;define void @test_fpowi(half* %p, i32 %b) {




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