[PATCH] D62360: [X86] Add zero idioms to the haswell, broadwell, and skylake schedule models. Add 256-bit fp xor to sandybridge zero idioms

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb accepted this revision.
andreadb added a comment.

LGTM (modulo the changes requested by Simon).

Thanks Craig!

----

About PR41982:

It would be really nice if we could teach llvm-mca how to identify dependency-breaking idioms.
That could be done in a follow-up patch by adding some extra tablegen definitions to those scheduling models.
For example, on BtVer2 we have something like this:

  def : IsZeroIdiomFunction<[
    // GPR Zero-idioms.
    DepBreakingClass<[ SUB32rr, SUB64rr, XOR32rr, XOR64rr ], ZeroIdiomPredicate>
    ...
  ]>;

In general, we can propagate information about dependency-breaking instructions to llvm-mca by instantiating tablegen class `IsZeroIdiomFunction` and `IsDepBreakingFunction`.
llvm-mca uses that information to accurately identify register dependencies.

Obviously, this is entirely optional; at the moment, only llvm-mca uses those definitions. Personally, I am already very happy to see this patch.
But I think that at some point we should consider adding those extra definitions in order to fully address PR41982.

Thanks,
-Andrea


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