[PATCH] D60601: [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function

[Zixuan Wu via Phabricator via llvm-commits]

wuzish added a comment.

Gentle pin....

Is there any possibility to do such optimization during RA or after RA, when the integer register pressure is not that big? Any way or hook where I can implement it llvm infra has prepared?


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  rL LLVM

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https://reviews.llvm.org/D60601