[PATCH] D62266: [DAGCombine][X86][AArch64][ARM] (C - x) + y -> (y - x) + C fold

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> So the DAG is simpler, but that particular case is worse for the backend.

It's "simpler", in some sense, but it's more complicated to lower because it's using the carry output of a uaddo in a non-addcarry operation, which is legal, but more expensive than using in an addcarry, particularly on ARM.  I think the missing combine is that we should be able to turn the subtraction into some form of addcarry/subcarry.


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  rL LLVM

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  https://reviews.llvm.org/D62266/new/

https://reviews.llvm.org/D62266