[PATCH] D62223: [DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 22 12:19:06 PDT 2019
lebedev.ri added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2926
+ // Hoist one-use addition by constant: (x + C) - y -> (x - y) + C
+ if (N0.hasOneUse() && N0.getOpcode() == ISD::ADD &&
+ isConstantOrConstantVector(N0.getOperand(1))) {
----------------
bjope wrote:
> Not sure if it is super important, or common, in reality. But maybe this should be trigger for an add-like-or as well?
>
> An ADD with no common bits set in the operands is canonicalized into OR by DAGCombiner, so there could be lots of OR:s out there that really are ADD:s.
Yes, correct observation. I did think about it when writing,
but i did not see any easy way to do that here.
Any suggestions?
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62223/new/
https://reviews.llvm.org/D62223
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