[llvm] r361330 - AMDGPU: Fix not marking new gfx10 SGPRs as CSRs

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Tue May 21 16:23:05 2019
New Revision: 361330

URL: http://llvm.org/viewvc/llvm-project?rev=361330&view=rev
Log:
AMDGPU: Fix not marking new gfx10 SGPRs as CSRs

Added:
    llvm/trunk/test/CodeGen/AMDGPU/csr-gfx10.ll
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUCallingConv.td

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUCallingConv.td?rev=361330&r1=361329&r2=361330&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUCallingConv.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUCallingConv.td Tue May 21 16:23:05 2019
@@ -110,12 +110,12 @@ def CSR_AMDGPU_VGPRs_32_255 : CalleeSave
   (sequence "VGPR%u", 32, 255)
 >;
 
-def CSR_AMDGPU_SGPRs_32_103 : CalleeSavedRegs<
-  (sequence "SGPR%u", 32, 103)
+def CSR_AMDGPU_SGPRs_32_105 : CalleeSavedRegs<
+  (sequence "SGPR%u", 32, 105)
 >;
 
 def CSR_AMDGPU_HighRegs : CalleeSavedRegs<
-  (add CSR_AMDGPU_VGPRs_32_255, CSR_AMDGPU_SGPRs_32_103)
+  (add CSR_AMDGPU_VGPRs_32_255, CSR_AMDGPU_SGPRs_32_105)
 >;
 
 // Calling convention for leaf functions

Added: llvm/trunk/test/CodeGen/AMDGPU/csr-gfx10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/csr-gfx10.ll?rev=361330&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/csr-gfx10.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/csr-gfx10.ll Tue May 21 16:23:05 2019
@@ -0,0 +1,15 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -o - %s | FileCheck -check-prefix=GFX10 %s
+
+; Make sure new higher SGPRs are callee saved
+; GFX10-LABEL: {{^}}callee_new_sgprs:
+; GFX10: v_writelane_b32 v0, s104, 0
+; GFX10: v_writelane_b32 v0, s105, 1
+; GFX10: ; clobber s104
+; GFX10: ; clobber s105
+; GFX10: v_readlane_b32 s105, v0, 1
+; GFX10: v_readlane_b32 s104, v0, 0
+define void @callee_new_sgprs() {
+  call void asm sideeffect "; clobber s104", "~{s104}"()
+  call void asm sideeffect "; clobber s105", "~{s105}"()
+  ret void
+}