[PATCH] D62132: [RFC] Intrinsics for Hardware Loops

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

Hi Jon,

I used a (br (icmp (intrinsic))) combination just because we don't have native i1 support in the Arm backend, I've been lazy to get a quick prototype together. I want these intrinsics to return an i1 to be used directly the brcond. We also want to keep a GP live too (our loop counter lives in the link register) so it sounds very similar to you.

I've focused on supporting masked load/stores because it is the more involved side of this transform so I wanted a proof-of-concept. I'm currently converting the PPC pass to a target independent pass and that appears to handle the 'normal' loops fine. I'll try to post that up tomorrow and if people are reasonably happy with the approach, I'll break it up again and leave the predicate support until last.

Thanks for taking a look.


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