[PATCH] D62102: [AArch64] Bit-extract with shifted mask (UBFX)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: t.p.northover, RKSimon, craig.topper, pcc.
lebedev.ri added a project: LLVM.
Herald added subscribers: kristof.beyls, javed.absar.

I was investigating regressions in https://reviews.llvm.org/D62100#change-c0aDpsCUsZ0a
and it looked like this was the missing piece, but apparently there is something else missing..

Note that i have deleted `AArch64TargetLowering::isDesirableToCommuteWithShift()`
override, since this adds support for the pattern mentioned there.
And in general that hook is rather useless, since it is forgotten about in *many*
places in DAGCombine, e.g. `shl (srl x, c1), c2` fold is not guarded with it.

This highlights a few missing opts:

-

  lsl x8, x8, #3
  ldr x0, [x9, x8]

isn't combined into `ldr x0, [x9, x8, lsl #3]`

-

  lsl w9, w9, #12
  lsr w9, w9, #26

should be just

  lsr w9, w9, #14

- `@no_extract_shrl` in rotate-extract.ll means that `BFXIL` just picks the first opportunity?


Repository:
  rL LLVM

https://reviews.llvm.org/D62102

Files:
  lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.h
  test/CodeGen/AArch64/arm64-bitfield-extract.ll
  test/CodeGen/AArch64/bitfield-insert.ll
  test/CodeGen/AArch64/extract-bits.ll
  test/CodeGen/AArch64/pull-binop-through-shift.ll
  test/CodeGen/AArch64/rotate-extract.ll
  test/CodeGen/AArch64/selectcc-to-shiftand.ll

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