[PATCH] D62028: [DebugInfo][AArch64] Recognise target specific instruction as mov instr

[Alexey Lapshin via Phabricator via llvm-commits]

avl created this revision.
avl added reviewers: efriedma, SjoerdMeijer, aprantl, dblaikie.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

This fix is for the problem from https://bugs.llvm.org/show_bug.cgi?id=38714.
Specifically, Simple Register Coalescing creates following conversion :

      
  undef %0.sub_32:gpr64 = ORRWrs $wzr, %3:gpr32common, 0, debug-location !24;
      

It copies 32-bit value from gpr32 into gpr64. But Live DEBUG_VALUE analysis
is not able to create debug location record for that instruction. So the problem
is in that debug location for argc variable is incorrect. The fix is
to write custom isCopyInstrImpl() which would recognize the ORRWrs instr.


https://reviews.llvm.org/D62028

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.ll

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