[llvm] r359895 - AMDGPU: Remove redundant patterns for shifts

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Fri May  3 08:08:36 2019
New Revision: 359895

URL: http://llvm.org/viewvc/llvm-project?rev=359895&view=rev
Log:
AMDGPU: Remove redundant patterns for shifts

Modified:
    llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td

Modified: llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td?rev=359895&r1=359894&r2=359895&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td Fri May  3 08:08:36 2019
@@ -519,11 +519,9 @@ class DivergentClampingBinOp<SDPatternOp
       )
   >;
 
-let AddedComplexity = 1 in {
-  def : DivergentBinOp<srl, V_LSHRREV_B32_e64>;
-  def : DivergentBinOp<sra, V_ASHRREV_I32_e64>;
-  def : DivergentBinOp<shl, V_LSHLREV_B32_e64>;
-}
+def : DivergentBinOp<srl, V_LSHRREV_B32_e64>;
+def : DivergentBinOp<sra, V_ASHRREV_I32_e64>;
+def : DivergentBinOp<shl, V_LSHLREV_B32_e64>;
 
 let SubtargetPredicate = HasAddNoCarryInsts in {
   def : DivergentBinOp<add, V_ADD_U32_e32>;
@@ -534,12 +532,9 @@ let SubtargetPredicate = isGFX6GFX7GFX8G
 def : DivergentBinOp<add, V_ADD_I32_e32>;
 def : DivergentBinOp<sub, V_SUB_I32_e32>;
 
-def : DivergentBinOp<srl, V_LSHRREV_B32_e32>;
-def : DivergentBinOp<sra, V_ASHRREV_I32_e32>;
-def : DivergentBinOp<shl, V_LSHLREV_B32_e32>;
-}
 def : DivergentBinOp<adde, V_ADDC_U32_e32>;
 def : DivergentBinOp<sube, V_SUBB_U32_e32>;
+}
 
 class divergent_i64_BinOp <SDPatternOperator Op, Instruction Inst> :
   GCNPat<