[llvm] r359767 - [ARM GlobalISel] Rename some inst selector tests. NFC
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Thu May 2 02:24:47 PDT 2019
Author: rovka
Date: Thu May 2 02:24:47 2019
New Revision: 359767
URL: http://llvm.org/viewvc/llvm-project?rev=359767&view=rev
Log:
[ARM GlobalISel] Rename some inst selector tests. NFC
Prepare to add support for extensions to types smaller than 32 bits.
Modified:
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
llvm/trunk/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir?rev=359767&r1=359766&r2=359767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir Thu May 2 02:24:47 2019
@@ -1,11 +1,11 @@
# RUN: llc -O0 -mtriple arm-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
- define void @test_trunc_and_zext_s1() { ret void }
- define void @test_trunc_and_sext_s1() { ret void }
- define void @test_trunc_and_sext_s8() { ret void }
- define void @test_trunc_and_zext_s16() { ret void }
- define void @test_trunc_and_anyext_s8() { ret void }
- define void @test_trunc_and_anyext_s16() { ret void }
+ define void @test_trunc_and_zext_s1_to_s32() { ret void }
+ define void @test_trunc_and_sext_s1_to_s32() { ret void }
+ define void @test_trunc_and_sext_s8_to_s32() { ret void }
+ define void @test_trunc_and_zext_s16_to_s32() { ret void }
+ define void @test_trunc_and_anyext_s8_to_s32() { ret void }
+ define void @test_trunc_and_anyext_s16_to_s32() { ret void }
define void @test_add_s32() { ret void }
define void @test_add_fold_imm_s32() { ret void }
@@ -54,8 +54,8 @@
attributes #2 = { "target-features"="+v6t2" }
...
---
-name: test_trunc_and_zext_s1
-# CHECK-LABEL: name: test_trunc_and_zext_s1
+name: test_trunc_and_zext_s1_to_s32
+# CHECK-LABEL: name: test_trunc_and_zext_s1_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -83,8 +83,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_sext_s1
-# CHECK-LABEL: name: test_trunc_and_sext_s1
+name: test_trunc_and_sext_s1_to_s32
+# CHECK-LABEL: name: test_trunc_and_sext_s1_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -113,8 +113,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_sext_s8
-# CHECK-LABEL: name: test_trunc_and_sext_s8
+name: test_trunc_and_sext_s8_to_s32
+# CHECK-LABEL: name: test_trunc_and_sext_s8_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -143,8 +143,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_zext_s16
-# CHECK-LABEL: name: test_trunc_and_zext_s16
+name: test_trunc_and_zext_s16_to_s32
+# CHECK-LABEL: name: test_trunc_and_zext_s16_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -173,8 +173,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_anyext_s8
-# CHECK-LABEL: name: test_trunc_and_anyext_s8
+name: test_trunc_and_anyext_s8_to_s32
+# CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -201,8 +201,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_anyext_s16
-# CHECK-LABEL: name: test_trunc_and_anyext_s16
+name: test_trunc_and_anyext_s16_to_s32
+# CHECK-LABEL: name: test_trunc_and_anyext_s16_to_s32
legalized: true
regBankSelected: true
selected: false
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir?rev=359767&r1=359766&r2=359767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir Thu May 2 02:24:47 2019
@@ -1,20 +1,20 @@
# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
- define void @test_trunc_and_zext_s1() { ret void }
- define void @test_trunc_and_sext_s1() { ret void }
- define void @test_trunc_and_anyext_s1() { ret void }
-
- define void @test_trunc_and_zext_s8() { ret void }
- define void @test_trunc_and_sext_s8() { ret void }
- define void @test_trunc_and_anyext_s8() { ret void }
-
- define void @test_trunc_and_zext_s16() { ret void }
- define void @test_trunc_and_sext_s16() { ret void }
- define void @test_trunc_and_anyext_s16() { ret void }
+ define void @test_trunc_and_zext_s1_to_s32() { ret void }
+ define void @test_trunc_and_sext_s1_to_s32() { ret void }
+ define void @test_trunc_and_anyext_s1_to_s32() { ret void }
+
+ define void @test_trunc_and_zext_s8_to_s32() { ret void }
+ define void @test_trunc_and_sext_s8_to_s32() { ret void }
+ define void @test_trunc_and_anyext_s8_to_s32() { ret void }
+
+ define void @test_trunc_and_zext_s16_to_s32() { ret void }
+ define void @test_trunc_and_sext_s16_to_s32() { ret void }
+ define void @test_trunc_and_anyext_s16_to_s32() { ret void }
...
---
-name: test_trunc_and_zext_s1
-# CHECK-LABEL: name: test_trunc_and_zext_s1
+name: test_trunc_and_zext_s1_to_s32
+# CHECK-LABEL: name: test_trunc_and_zext_s1_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -44,8 +44,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_sext_s1
-# CHECK-LABEL: name: test_trunc_and_sext_s1
+name: test_trunc_and_sext_s1_to_s32
+# CHECK-LABEL: name: test_trunc_and_sext_s1_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -76,8 +76,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_anyext_s1
-# CHECK-LABEL: name: test_trunc_and_anyext_s1
+name: test_trunc_and_anyext_s1_to_s32
+# CHECK-LABEL: name: test_trunc_and_anyext_s1_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -105,8 +105,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_zext_s8
-# CHECK-LABEL: name: test_trunc_and_zext_s8
+name: test_trunc_and_zext_s8_to_s32
+# CHECK-LABEL: name: test_trunc_and_zext_s8_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -136,8 +136,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_sext_s8
-# CHECK-LABEL: name: test_trunc_and_sext_s8
+name: test_trunc_and_sext_s8_to_s32
+# CHECK-LABEL: name: test_trunc_and_sext_s8_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -167,8 +167,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_anyext_s8
-# CHECK-LABEL: name: test_trunc_and_anyext_s8
+name: test_trunc_and_anyext_s8_to_s32
+# CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -196,8 +196,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_zext_s16
-# CHECK-LABEL: name: test_trunc_and_zext_s16
+name: test_trunc_and_zext_s16_to_s32
+# CHECK-LABEL: name: test_trunc_and_zext_s16_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -227,8 +227,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_sext_s16
-# CHECK-LABEL: name: test_trunc_and_sext_s16
+name: test_trunc_and_sext_s16_to_s32
+# CHECK-LABEL: name: test_trunc_and_sext_s16_to_s32
legalized: true
regBankSelected: true
selected: false
@@ -258,8 +258,8 @@ body: |
; CHECK: BX_RET 14, $noreg, implicit $r0
...
---
-name: test_trunc_and_anyext_s16
-# CHECK-LABEL: name: test_trunc_and_anyext_s16
+name: test_trunc_and_anyext_s16_to_s32
+# CHECK-LABEL: name: test_trunc_and_anyext_s16_to_s32
legalized: true
regBankSelected: true
selected: false
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