[PATCH] D32530: [SVE][IR] Scalable Vector IR Type

Graham Hunter via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 1 02:25:54 PDT 2019


huntergr added a comment.

In D32530#1484668 <https://reviews.llvm.org/D32530#1484668>, @hfinkel wrote:

> In D32530#1484027 <https://reviews.llvm.org/D32530#1484027>, @huntergr wrote:
>
> > Noted the change in semantics for `extractelement` and `insertelement` in the langref.
>
>
> Why implementation defined and not UB for the case where the index exceeds the runtime length? How do you intend to define this for SVE?


SVE uses a predicate for indexed inserts and extracts. We generate that predicate by comparing a splat of the index against a stepvector (0,1,2,3...); if the index is out of range then the predicate will be all false.

For a `mov` (insert), that results in an unmodified vector.

For a `lastb` (extract), that extracts the last lane in the vector if no predicate bits are true.

I don't know if RVV or SX-Aurora have similarly defined semantics. If the preference is to make it UB, that's fine.


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