[PATCH] D32530: [SVE][IR] Scalable Vector IR Type

[David Greene via Phabricator via llvm-commits]

greened added inline comments.


================
Comment at: docs/LangRef.rst:2755
+time. The size of a specific scalable vector type is thus constant within
+IR, even if the exact size in bytes cannot be determined until run time.
 
----------------
huntergr wrote:
> PkmX wrote:
> > greened wrote:
> > > Just want to double-check: there is nothing about scalable vectors that assumes all vector types have the same bit width, correct?  Can <scalable 1 x float> have a different bit width from <scalable 1 x double>?
> > I believe the intention is that `<scalable 1 x double>` should have twice many bits as `<scalable 1 x float>`, or the same many bits as `<scalable 2 x float>`.
> That's correct. I think that a clearer syntax might be ##<vscale x 1 x float>## to indicate that the number of elements is being multiplied by the same ##vscale## term for all scalable vector types.
> 
> The intent is that we should be able to reason about the relative sizes of different scalable vector types based on the element size and minimum number of lanes alone.
+1 for `<vscale x 1 x float>`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D32530/new/

https://reviews.llvm.org/D32530