[PATCH] D60861: [MachineScheduler] Check pending instructions when an instruction is scheduled

[Hal Finkel via Phabricator via llvm-commits]

hfinkel accepted this revision.
hfinkel added a comment.
This revision is now accepted and ready to land.

In D60861#1472146 <https://reviews.llvm.org/D60861#1472146>, @jmolloy wrote:

> Hi Hal,
>
> Yes, that's right. The architecture in question is VLIW, so there is plenty of available parallelism per cycle and esoteric constraints.


Okay, can you please update the comment to make it clear that this is specifically to support this kind of situation?

Otherwise, I think this is fine.

> Cheers,
> 
> James




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