[PATCH] D60861: [MachineScheduler] Check pending instructions when an instruction is scheduled

[James Molloy via Phabricator via llvm-commits]

jmolloy added a comment.

Hi Hal,

Yes, that's right. The architecture in question is VLIW, so there is plenty of available parallelism per cycle and esoteric constraints.

Cheers,

James


Repository:
  rL LLVM

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  https://reviews.llvm.org/D60861/new/

https://reviews.llvm.org/D60861