[PATCH] D59780: Support Intel Control-flow Enforcement Technology

Thu Apr 18 01:28:25 PDT 2019

ruiu added a comment.

In D59780#1471032 <https://reviews.llvm.org/D59780#1471032>, @xiangzhangllvm wrote:

> We are Ok with with the 2-PLT scheme.
>
> >   I think I'd like **more opinions from others**.  **there are announcements but no design discussions**
>
> Hi, Fangrui, the 2-PLT scheme has pass the ABI discussions, not H.J just made it by only himself.
>
> >   **gives performance numbers demonstrating this second PLT scheme has indeed the cache-locality merit and is better than the alternative 24-byte PLT entry scheme**.
>
> Yes, We really have not performance evidence, but this design is really more performance in theory, and this scheme has done years , and **nothing went wrong**.
>  The 24-bit plt is beautiful, but it is not the overwhelming reason to overthrow the big previous works.

Let's discuss that on the x86-64 System V ABI mailing list. I signed up and once approved, I'll send a mail there.

Repository:
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  https://reviews.llvm.org/D59780/new/

https://reviews.llvm.org/D59780