[PATCH] D60550: [X86] Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 17 13:31:04 PDT 2019


RKSimon added a comment.

Some initial thoughts - I don't know a lot about the bfloat16 instructions so need to read up when I get the chance.



================
Comment at: include/llvm/IR/IntrinsicsX86.td:4833
+              [IntrNoMem]>;
+  // Intrinsic must be masked due to it producing less than 128 bits of results.
+  def int_x86_avx512bf16_mask_cvtneps2bf16_128:
----------------
Is there no way around this - other conversions don't need this.


================
Comment at: lib/Target/X86/X86ISelLowering.h:513
+      // Vector float to bfloat16
+      CVTNE2PS2BF16, CVTNEPS2BF16, DPBF16PS,
+
----------------
Bit more description would be good if possible - those enums look very similar at first glance!


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60550/new/

https://reviews.llvm.org/D60550





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