[PATCH] D60708: [ARM] Code-generation infrastructure for MVE.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham created this revision.
simon_tatham added reviewers: dmgreen, samparker, SjoerdMeijer.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

This provides the low-level support to start using MVE vector types
and predicated instructions in C source code:

- spills, reloads and register moves for MVE vector registers
- ditto for the VPT predication mask that lives in VPR.P0
- make all the MVE vector types legal in ISel, and provide selection DAG patterns for LOAD and STORE
- an extension of Thumb2ITBlockPass to spot MachineInstrs that list themselves as VPT-predicated, and add the actual VPST instruction above each one.

The VPT block generation is currently trivial: it only ever puts one
instruction in a block (no longer forms such as VPTTET), and it always
uses the VPST instruction (meaning 'predicate on whatever was already
in P0') as opposed to VPT ('do a comparison and immediately start a
VPT block based on the results').


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D60708

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
  llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  llvm/lib/Target/ARM/Thumb2InstrInfo.h

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