[PATCH] D60437: Add MM register mapping from CodeView to MC register id

Thu Apr 11 06:30:37 PDT 2019

LuoYuanke added a comment.

In D60437#1462379 <https://reviews.llvm.org/D60437#1462379>, @hans wrote:

> In D60437#1462279 <https://reviews.llvm.org/D60437#1462279>, @LuoYuanke wrote:
>
> > In D60437#1461210 <https://reviews.llvm.org/D60437#1461210>, @hans wrote:
> >
> > > I'm not familiar with the CodeView stuff, rnk is the better person for that, but would it be possible to add a test that exercises this mapping? Or to put it another way, what does this fix that's currently broken, and is it possible to add a test for it?
> >
> >
> > I try to add such test case, but I don't find any existing test case for mapping codeveiw register to MC register.
> >  @rnk
> >  Do you know if there is any reference test case in llvm/test code?
>
>
> You can try removing a bunch of the entries in RegMap and see which tests fail. They're all in llvm/tests/DebugInfo/COFF/
>  I don't think there's any test for the mapping itself, but the tests rely on it to work.
>
> That's what my second question was about: what is currently not working that your patch is fixing, and can that be used to write a test?

Thank you for the suggestion. I disable the code of xmm0 - xmm7 mapping and there is no case failure in llvm/tests/DebugInfo/COFF/. However when I disable general register (rax -r15), some of the test cases (.e.g test/DebugInfo/COFF/types-basic.ll) fail. There is pretty much code for the failed test case which I'm investigating. To create a small test case, we may need to cause much pressure on register allocator for mm0 - mm7 with __m64 variable in c code. However I have not figured out how to created such case.
Nevertheless, does anybody know why the mm0-mm7 registers are not mapped. Is there any reasons on it?

Repository:
  rL LLVM

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https://reviews.llvm.org/D60437