[PATCH] D60546: [X86] Use MOVQ for i64 atomic_stores when SSE2 is enabled

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 11 01:36:52 PDT 2019


RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:26229
+                                 const X86Subtarget &Subtarget) {
+  auto *Node = cast<AtomicSDNode>(Op.getNode());
   SDLoc dl(Node);
----------------
cast<AtomicSDNode>(Op) should work ?


================
Comment at: llvm/test/CodeGen/X86/atomic6432.ll:841
+; X32-NEXT:    movd %ecx, %xmm0
+; X32-NEXT:    pinsrd $1, %eax, %xmm0
+; X32-NEXT:    movq %xmm0, sc64
----------------
craig.topper wrote:
> Not sure why we didn't merge consecutive loads here.
https://bugs.llvm.org/show_bug.cgi?id=39473


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60546/new/

https://reviews.llvm.org/D60546





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