[PATCH] D60546: [X86] Use MOVQ for i64 non-seq_cst atomic_stores when SSE2 is enabled

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 10 15:45:05 PDT 2019


craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, reames, jfb, efriedma.
Herald added subscribers: dexonsmith, hiraditya.
Herald added a project: LLVM.

If we have SSE2 we can use a MOVQ to store 64-bits and avoid falling back to a cmpxchg8b loop. Unless the store is seq_cst.


https://reviews.llvm.org/D60546

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrAVX512.td
  llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/test/CodeGen/X86/atomic-fp.ll
  llvm/test/CodeGen/X86/atomic6432.ll

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