[PATCH] D60459: SILoadStoreOptimizer pass mischedules s_add,s_addc with interfering s_lshl

[Ron Lieberman via Phabricator via llvm-commits]

ronlieb updated this revision to Diff 194420.
ronlieb added a comment.

Added check for instr match missing, and bail on optimization if so.
I prefer the .ll test we have for the patch now over that of creating an MIR test for this issue.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60459/new/

https://reviews.llvm.org/D60459

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/scc-add-lshl-addc.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D60459.194420.patch
Type: text/x-patch
Size: 4831 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190409/8d5e2ccc/attachment.bin>