[PATCH] D60367: [TableGen] Introduce !listsplat 'binary' operator

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Not objecting to this feature. Just asking a question.



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Comment at: lib/Target/X86/X86ScheduleBdVer2.td:214
+                          !listsplat(1, !size(ExePorts)),
+                          Res))),
                     !add(UOps, LoadUOps)>;
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Doesn’t WriteRes already treat an empty list as 1 cycle per port?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60367/new/

https://reviews.llvm.org/D60367