[PATCH] D60314: [DAGCombiner] Add missing flag to addressing mode check
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 5 05:39:24 PDT 2019
luismarques created this revision.
luismarques added reviewers: efriedma, asb.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
The DAGCombiner helper function `canFoldInAddressingMode` performs some checks for legal addressing modes, such as reg+imm. The `TargetLowering::AddrMode` struct used for that check should have the `HasBaseReg` field set to true to indicate the presence of a reg (other than the scale reg). The function did not set that field (and by default it's false). This patch corrects that oversight. No tests were impacted by the change, as the oversight did not seem to manifest as an actual problem at the moment.
Repository:
rL LLVM
https://reviews.llvm.org/D60314
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12814,6 +12814,7 @@
return false;
TargetLowering::AddrMode AM;
+ AM.HasBaseReg = true;
if (N->getOpcode() == ISD::ADD) {
ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
if (Offset)
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