[PATCH] D58736: [System Model] Introduce a target system model

[David Greene via Phabricator via llvm-commits]

greened added a comment.

In D58736#1434008 <https://reviews.llvm.org/D58736#1434008>, @Meinersbur wrote:

> Thank you for pushing this forward and sorry for the delay.
>
> Could you add some central high-level documentation about what the memory system model is? E.g. describe that an `MCSystemModel` has a list of execution resources, memory hierarchies, prefetch configs and write-combining buffers. A Cache hierarchy as a total size, line size, associativity, etc. To get the interpretation eight, please add more details about ever parameter, particularly the prefetch configs. Some other examples than ARM big.LITTLE would be nice as well.


Will do.

> What exactly is a "prefetch config"? Is there a prefetch config for each cache level? Different hardware mechanisms for prefetch (e.g. stride detection or software-estabslished). Different strategies for inserting prefetch instruction selectable at compile-time?

This is certainly an area for exploration.  Currently the model doesn't have a prefetch config for each cache level but we could make it so.  I'm not sure if the flexibility will be needed or not.  We haven't needed in the past but processors are getting a lot more complicated in this area.

The intent is to describe parameters for software prefetching.  It doesn't attempt to describe hardware prefetchers but that may be useful depending on the problem at hand.  I think that's something we could consider for later.

> AFAICS, this patch does uses the default model for all targets?

Yes, currently.  My intent was not to disrupt how anything currently works as far as what TTI returns for its interfaces.  Individual subtargets can then opt-in by defining a non-default model.


Repository:
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https://reviews.llvm.org/D58736