[PATCH] D60138: [X86] Merge the different SETcc instructions for each condition code into single instructions that store the condition code as an operand.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: andreadb, courbet, RKSimon, spatel.
Herald added a reviewer: lebedev.ri.
Herald added a subscriber: lebedev.ri.
craig.topper added a parent revision: D60041: [X86] Merge the different CMOV instructions for each condition code into single instructions that store the condition code as an immediate..
craig.topper marked an inline comment as done.
craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86FixupLEAs.cpp:158
+
+  if (!MI.isConvertibleTo3Addr())
+    return nullptr;
----------------
I'll pull this out of this patch and rebase later today.


This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between SETcc instructions and condition codes.

      

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.


https://reviews.llvm.org/D60138

Files:
  lib/Target/X86/MCTargetDesc/X86BaseInfo.h
  lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
  lib/Target/X86/X86FastISel.cpp
  lib/Target/X86/X86FixupLEAs.cpp
  lib/Target/X86/X86FixupSetCC.cpp
  lib/Target/X86/X86FlagsCopyLowering.cpp
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86InstrCMovSetCC.td
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86InstrFoldTables.cpp
  lib/Target/X86/X86InstrFormats.td
  lib/Target/X86/X86InstrInfo.cpp
  lib/Target/X86/X86InstrInfo.h
  lib/Target/X86/X86InstructionSelector.cpp
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86SchedHaswell.td
  lib/Target/X86/X86SchedPredicates.td
  lib/Target/X86/X86SchedSandyBridge.td
  lib/Target/X86/X86SchedSkylakeClient.td
  lib/Target/X86/X86SchedSkylakeServer.td
  lib/Target/X86/X86ScheduleBdVer2.td
  test/CodeGen/X86/GlobalISel/select-cmp.mir
  test/CodeGen/X86/GlobalISel/select-phi.mir
  test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
  test/CodeGen/X86/flags-copy-lowering.mir
  test/CodeGen/X86/pr27681.mir
  test/CodeGen/X86/stack-folding-adx.mir
  tools/llvm-exegesis/lib/X86/Target.cpp
  utils/TableGen/X86RecognizableInstr.cpp
  utils/TableGen/X86RecognizableInstr.h

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