[PATCH] D60041: [X86] Merge the different CMOV instructions for each condition code into single instructions that store the condition code as an immediate.

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 31 12:20:05 PDT 2019


lebedev.ri added a reviewer: courbet.
lebedev.ri added a comment.

Observation: this affects llvm-exegesis.
At least, this diff is needed:

  diff --git a/tools/llvm-exegesis/lib/X86/Target.cpp b/tools/llvm-exegesis/lib/X86/Target.cpp
  index 369ed2f97d7..3acde820c37 100644
  --- a/tools/llvm-exegesis/lib/X86/Target.cpp
  +++ b/tools/llvm-exegesis/lib/X86/Target.cpp
  @@ -32,6 +32,7 @@ static Error isInvalidMemoryInstr(const Instruction &Instr) {
     case X86II::MRMSrcReg:
     case X86II::MRMSrcReg4VOp3:
     case X86II::MRMSrcRegOp4:
  +  case X86II::MRMSrcRegCC:
     case X86II::MRMXr:
     case X86II::MRM0r:
     case X86II::MRM1r:
  @@ -118,6 +119,7 @@ static Error isInvalidMemoryInstr(const Instruction &Instr) {
     case X86II::MRMSrcMem:
     case X86II::MRMSrcMem4VOp3:
     case X86II::MRMSrcMemOp4:
  +  case X86II::MRMSrcMemCC:
     case X86II::MRMXm:
     case X86II::MRM0m:
     case X86II::MRM1m:

But even then, unlike other instructions with immediates for whom it 'correctly' sets imm to 1,
it just crashes here:

  $ ./bin/llvm-exegesis -mode=latency -opcode-name=ADD32ri
  Check generated assembly with: /usr/bin/objdump -d /tmp/snippet-ee6c66.o
  ---
  mode:            latency
  key:             
    instructions:    
      - 'ADD32ri R12D R12D i_0x1'
    config:          ''
    register_initial_values: 
      - 'R12D=0x0'
  cpu_name:        bdver2
  llvm_triple:     x86_64-unknown-linux-gnu
  num_repetitions: 10000
  measurements:    
    - { key: latency, value: 1.5217, per_snippet_value: 1.5217 }
  error:           ''
  info:            Repeating a single implicitly serial instruction
  assembled_snippet: 415441BC000000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C4010000004181C401000000415CC3
  ...
  $ ./bin/llvm-exegesis -mode=latency -opcode-name=CMOV32rr 
  Operand is not set
  UNREACHABLE executed at /build/llvm/tools/llvm-exegesis/lib/Assembler.cpp:114!
  Aborted

(i'll leave out of the comment the fact that llvm-exegesis currently does not try to
check all the condcodes, i was actually going to try to experiment with that here..)


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60041/new/

https://reviews.llvm.org/D60041





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