[PATCH] D59484: [TargetLowering] Add SimplifyDemandedBits support for ISD::INSERT_VECTOR_ELT

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:578
+
+    if (!!DemandedVecElts)
+      if (SimplifyDemandedBits(Vec, OriginalDemandedBits, DemandedVecElts,
----------------
Why is this check necessary? If there are no demanded elements, wouldn't this allow folding the input vector to undef?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59484/new/

https://reviews.llvm.org/D59484