[PATCH] D59558: [AArch64][GlobalISel] Add an optimization to select vector DUP instructions

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added a reviewer: paquette.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.

This adds pattern matching for the insert+shufflevector sequence so we can generate dup instructions instead of the current TBL sequence.

Currently doesn't handle vectors < 128b in size yet.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D59558

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/opt-shuffle-splat.mir

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