[PATCH] D59519: [WebAssembly] Lower float setcc nodes with nnan

[Derek Schuff via Phabricator via llvm-commits]

dschuff accepted this revision.
dschuff added a comment.
This revision is now accepted and ready to land.

to make the change even clearer, you could just say in the commit message that it just adds the missing non-equality opcodes.



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Comment at: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:422
+// target-independent expansion of unordered comparisons and ordered ne.
+foreach nodes = [[seteq, EQ_v4f32], [setne, NE_v4f32], [setlt, LT_v4f32],
+                 [setgt, GT_v4f32], [setle, LE_v4f32], [setge, GE_v4f32]] in
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do we also need ord? I guess ord would trivially be true since they are nnan? Anyway, not sure how exactly the dag nodes line up with the LLVM IR ones, but let's jsut make sure we aren't missing more while we're at it.


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https://reviews.llvm.org/D59519