[llvm] r356407 - [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri patterns to be consistent with the ROR patterns.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 18 13:43:15 PDT 2019
Author: ctopper
Date: Mon Mar 18 13:43:15 2019
New Revision: 356407
URL: http://llvm.org/viewvc/llvm-project?rev=356407&view=rev
Log:
[X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri patterns to be consistent with the ROR patterns.
Modified:
llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
llvm/trunk/test/CodeGen/X86/absolute-rotate.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td?rev=356407&r1=356406&r2=356407&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrShiftRotate.td Mon Mar 18 13:43:15 2019
@@ -472,17 +472,19 @@ def ROL64rCL : RI<0xD3, MRM0r, (outs GR6
def ROL8ri : Ii8<0xC0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2),
"rol{b}\t{$src2, $dst|$dst, $src2}",
- [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>;
+ [(set GR8:$dst, (rotl GR8:$src1, (i8 relocImm:$src2)))]>;
def ROL16ri : Ii8<0xC1, MRM0r, (outs GR16:$dst), (ins GR16:$src1, u8imm:$src2),
"rol{w}\t{$src2, $dst|$dst, $src2}",
- [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>, OpSize16;
+ [(set GR16:$dst, (rotl GR16:$src1, (i8 relocImm:$src2)))]>,
+ OpSize16;
def ROL32ri : Ii8<0xC1, MRM0r, (outs GR32:$dst), (ins GR32:$src1, u8imm:$src2),
"rol{l}\t{$src2, $dst|$dst, $src2}",
- [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>, OpSize32;
+ [(set GR32:$dst, (rotl GR32:$src1, (i8 relocImm:$src2)))]>,
+ OpSize32;
def ROL64ri : RIi8<0xC1, MRM0r, (outs GR64:$dst),
(ins GR64:$src1, u8imm:$src2),
"rol{q}\t{$src2, $dst|$dst, $src2}",
- [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>;
+ [(set GR64:$dst, (rotl GR64:$src1, (i8 relocImm:$src2)))]>;
// Rotate by 1
def ROL8r1 : I<0xD0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1),
Modified: llvm/trunk/test/CodeGen/X86/absolute-rotate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/absolute-rotate.ll?rev=356407&r1=356406&r2=356407&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/absolute-rotate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/absolute-rotate.ll Mon Mar 18 13:43:15 2019
@@ -24,4 +24,20 @@ f:
ret void
}
+define void @bar(i64 %val) {
+ %shr = shl i64 %val, zext (i8 ptrtoint (i8* @align to i8) to i64)
+ %shl = lshr i64 %val, zext (i8 sub (i8 64, i8 ptrtoint (i8* @align to i8)) to i64)
+ ; CHECK: rolq $align at ABS8, %rdi
+ %rol = or i64 %shr, %shl
+ %cmp = icmp ult i64 %rol, 109
+ br i1 %cmp, label %t, label %f
+
+t:
+ call void @f()
+ ret void
+
+f:
+ ret void
+}
+
!0 = !{i64 0, i64 128}
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