[PATCH] D59412: [X86] X86ISelLowering::combineSextInRegCmov(): also handle i8 CMOV's

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: test/CodeGen/X86/cmov-promotion.ll:155-157
+; CMOV-NEXT:    movw $117, %cx
+; CMOV-NEXT:    movw $-19, %ax
+; CMOV-NEXT:    cmovnew %cx, %ax
----------------
craig.topper wrote:
> lebedev.ri wrote:
> > And we now have i16 ops, which i think we want to avoid?
> > Do we want to do all this in i32, and trunc to i16 in the end?
> Yeah. If the VT is i16 we should use i32 instead.
Okay, no surprise there, i'll take a look..


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59412/new/

https://reviews.llvm.org/D59412