[PATCH] D59412: [X86] X86ISelLowering::combineSextInRegCmov(): also handle i8 CMOV's

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: test/CodeGen/X86/cmov-promotion.ll:155-157
+; CMOV-NEXT:    movw $117, %cx
+; CMOV-NEXT:    movw $-19, %ax
+; CMOV-NEXT:    cmovnew %cx, %ax
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lebedev.ri wrote:
> And we now have i16 ops, which i think we want to avoid?
> Do we want to do all this in i32, and trunc to i16 in the end?
Yeah. If the VT is i16 we should use i32 instead.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D59412/new/

https://reviews.llvm.org/D59412