[PATCH] D58015: [SelectionDAG][AArch64] Legalize VECREDUCE

[Nikita Popov via Phabricator via llvm-commits]

nikic updated this revision to Diff 189991.
nikic added a comment.
Herald added a subscriber: hiraditya.

If possible, use shuffle reduction in vecreduce expansion.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58015/new/

https://reviews.llvm.org/D58015

Files:
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/vecreduce-add-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll

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