[PATCH] D58980: [ARC] Add more load/store variants and simple pass to generate postincrement instructions

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin marked an inline comment as done.
dantrushin added inline comments.


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Comment at: llvm/lib/Target/ARC/ARCFrameLowering.cpp:297
         .addReg(ARC::FP, RegState::Define)
+        .addReg(ARC::SP, RegState::Define)
         .addReg(ARC::SP)
----------------
Update to match instruction format change - first operand now is loaded value, not updated base address
I think this looks more natural


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Comment at: llvm/lib/Target/ARC/ARCInstrInfo.td:815
+      def aa.InstSuffix#_rs9: F32_LD_RS9<x.Value, aa.Value, di.Value, zz.Value,
+					  (outs GPR32:$A, GPR32:$addrout),
+					  (ins GPR32:$B, immS<9>:$S9),
----------------
Loaded value is operand 0 now; Was 1


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58980/new/

https://reviews.llvm.org/D58980