[PATCH] D58974: [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS)
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 5 08:40:02 PST 2019
- Previous message: [PATCH] D58974: [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS)
- Next message: [PATCH] D58974: [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS)
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
spatel added a comment.
Do we have this as a generic DAGCombine? Or is the 'not' formed late and we have a BLENDV node rather than select/vselect?
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58974/new/
https://reviews.llvm.org/D58974
- Previous message: [PATCH] D58974: [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS)
- Next message: [PATCH] D58974: [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS)
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
More information about the llvm-commits
mailing list